MT40A2G8AG-062E AUT:F

MT40A2G8AG-062E AUT:F is a high-speed dynamic random-access memory internally configured as an eight-bank DRAM for the x16 configuration and a 16-bank DRAM for the x8 configurations. This memory uses an 8n-prefetch architecture to achieve high-speed operation. The 8n-prefetch architecture is combined with an interface designed to transfer two data words per clock cycle at the I/O pins. A single READ or WRITE operation for the memory consists of a single 8n-bit wide, four-clock data transfer at the internal DRAM core and two corresponding n-bit wide, one-half-clock-cycle data transfers at the I/O pins.

• 2Gig x 8 configuration, data rate is 3200MT/s, 1.2V pseudo open-drain I/O
• Timing (cycle time) is 0.625ns at CL = 22 (DDR4-3200)
• Automotive certification, supply voltage range is 1.14V to 1.26V
• Ultra-high temperature is –40°C to 125°C
• 8 internal banks (x16) is 2 groups of 4 banks each
• 8n-bit prefetch architecture, programmable data strobe preambles
• Data strobe preamble training, command/address latency (CAL)
• Multipurpose register READ and WRITE capability, write levelling, self refresh mode
• Low-power auto self refresh (LPASR), temperature controlled refresh (TCR)
• JEDEC JESD-79-4 compliant, sPPR and hPPR capability