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The joint test action group (JTAG) HS2 programming cable is a high speed programming solution for Xilinx® field-programmable gate arrays (FPGAs). The cable is fully compatible with all Xilinx tools and can be seamlessly driven from iMPACT™, ChipScope™, and EDK. The HS2 attaches to target boards using Digilent's 6 pin, 100 mil spaced programming header or Xilinx's 2x7, 2mm connector and the included adaptor. The PC powers the JTAG-HS2 through the USB port and will recognize it as a Digilent programming cable when connected to a PC, even if the cable is not attached to the target board. The HS2 has a separate VDD pin to supply the JTAG signal buffers. The high speed 24mA three state buffers allow target boards to drive the HS2 with signal voltages from 1.8V to 5V and bus speeds of up to 30MBit/sec.

• Standard type-A to Micro-USB cable that attaches to end of module opposite system board connector
• Analog Devices ADP123AUJZ linear regulator
• Small, complete, all-in-one JTAG programming solution for Xilinx FPGAs
• Compatible with all Xilinx tools
• Compatible with IEEE 1149.7-2009 class T0 - class T4 (includes 2-wire JTAG)
• Separate Vref drives JTAG/SPI signal voltages, Vref can be any voltage between 1.8V and 5V
• High speed USB2 port that can drive JTAG/SPI bus at up to 30Mbit/sec
• JTAG/SPI frequency settable by user, uses micro-AB USB2 connector
• SPI programming solution (modes 0 and 2 up to 30Mbit/sec, modes 1 and 3 up to 2Mbit/sec)
• Fully supported by Adept software and Adept SDK allowing custom JTAG/SPI applications to be created