P82B96DP,118

The P82B96DP,118 is a dual bidirectional Bus Buffer creates a non-latching, bidirectional, logic interface between the normal I²C-bus and a range of other bus configurations. It can interface I²C-bus logic signals to similar buses having different voltage and current levels. For example, it can interface to the 350µA SMBus, to 3.3V logic devices and to 15V levels and/or low-impedance lines to improve noise immunity on longer bus lengths. It achieves this interface without any restrictions on the normal I²C-bus protocols or clock speed. The IC adds minimal loading to the I²C-bus node and loadings of the new bus or remote I²C-bus nodes are not transmitted or transformed to the local node. Restrictions on the number of I²C-bus devices in a system or the physical separation between them, are virtually eliminated.

• Low power supply current
• Bidirectional data transfer of I²C-bus signals
• 400kHz Operation over at least 20 meters of wire
• Latch-up free (bipolar process with no latching structures)
• Interface between I²C-buses operating at different logic levels
• Interface between I²C-bus and SMBus (350µA) standard

Applications

Automation & Process Control, Portable Devices, Sensing & Instrumentation