S25FS128SAGMFV101

S25FS128SAGMFV101 is a S25FS128S flash non-volatile serial peripheral interface (SPI) flash memory using MIRRORBIT™ technology - that stores two data bits in each memory array transistor, eclipse architecture - that dramatically improves program and erase performance, 65nm process lithography. The FS-S eclipse architecture features a page programming buffer that allows up to 512bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. It offers high densities coupled with the flexibility and fast performance required by a variety of mobile or embedded applications. This is an excellent solution for systems with limited space, signal connections, and power. This is ideal for code shadowing to RAM, executing code directly, XIP, and storing reprogrammable data.

• SPI clock polarity and phase modes 0 and 3, modes: burst wrap, continuous (XIP), QPI
• Serial command subset and footprint compatible with S25FL-A, S25FL-K, S25FL-P families
• Multi I/O command subset and footprint compatible with S25FL-P, and S25FL-S SPI families
• Commands: normal, fast, dual I/O, quad I/O, DDR quad I/O
• Automatic ECC – internal hardware error correction code generation with single-bit error correction
• Program suspend and resume, erase suspend and resume, erase status evaluation
• One-time program (OTP) array of 1024 bytes, block protection, advanced sector protection (ASP)
• Individual sector protection controlled by boot code or password, supply voltage is 1.7V to 2.0V
• 128Mbit density, 133MHz SDR speed, SOIC package
• Industrial plus (–40°C to +105°C) temperature range