74LVC2T45DC,125

74LVC2T45DC,125 is a dual-bit, dual-supply translating transceiver with 3-state outputs that enable bidirectional level translation. It features two 2bits input-output ports (nA and nB), a direction control input (DIR), and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 1.2V and 5.5V making the device suitable for translating between any of the low-voltage nodes (1.2V, 1.5V, 1.8V, 2.5V, 3.3V and 5.0V). Pins nA and DIR are referenced to VCC(A) and pins nB are referenced to VCC(B). A HIGH on DIR allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A port and B port are in the high-impedance OFF-state.

• Wide supply voltage range: VCC(A): 1.2V to 5.5V, VCC(B): 1.2V to 5.5V
• High noise immunity, complies with JEDEC standards
• Suspend mode, latch-up performance exceeds 100mA per JESD 78 Class II
• ±24mA output drive (VCC = 3.0V), inputs accept voltages upto 5.5V
• Low power consumption is 16μA maximum ICC
• IOFF circuitry provides partial power-down mode operation, ESD protection
• Input capacitance is 2.2pF typical at (DIR input;VI= 0V or 3.3V;VCC(A) = VCC(B) = 3.3V)
• Supply current is 8μA maximum at (VCC(A), VCC(B) = 1.2V to 5.5V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C
• VSSOP8 package