LTC2192CUKG#PBF
Analog to Digital Converter, Pipelined, 16 bit, 65 MSPS, 2 Channels, Differential, Single Ended

| Manufacturer | ANALOG DEVICES |
|---|---|
| Manufacturer Part No | LTC2192CUKG#PBFCopy |
| Manufacturer Standard Lead Time | 12 weeks |
| Newark Part No. | 18AN4591 |
| Product Range | Dual 16-Bit Pipelined ADCs |
| Your Part Number | |
| Technical Datasheet |
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| Quantity | Price |
|---|---|
| 1+ | $176.830 |
| 5+ | $163.540 |
| 10+ | $150.240 |
| 25+ | $145.200 |
| 50+ | $140.160 |
| 100+ | $137.360 |
Product Information
| Manufacturer | ANALOG DEVICES |
|---|---|
| Manufacturer Part No | LTC2192CUKG#PBFCopy |
| Manufacturer Standard Lead Time | 12 weeks |
| Newark Part No. | 18AN4591 |
| Product Range | Dual 16-Bit Pipelined ADCs |
| Technical Datasheet | |
| ADC Architecture | Pipelined |
| Resolution | 16bit |
| Sampling Rate | 65MSPS |
| No. of Channels | 2Channels |
| Input Channel Type | Differential, Single Ended |
| Interfaces | Parallel, Serial |
| Supply Voltage Min | 1.7V |
| Supply Voltage Max | 1.9V |
| IC Case / Package | QFN-EP |
| No. of Pins | 52Pins |
| IC Mounting | Surface Mount |
| Operating Temperature Min | 0°C |
| Operating Temperature Max | 70°C |
| Product Range | Dual 16-Bit Pipelined ADCs |
| Qualification | - |
| SVHC | To Be Advised |
Product Overview
LTC2192CUKG#PBF is a 2-channel, simultaneous sampling 16-bit ADC designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 77dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows under sampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.3LSBRMS. To minimize the number of data lines the digital outputs are serial LVDS. Each channel outputs one bit, two bits or four bits at a time. The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.
- Serial LVDS outputs: 1, 2 or 4bits per channel
- Low power of 198mW total
- Single 1.8V supply
- Selectable input ranges from 1VP-P to 2VP-P
- 550MHz full-power bandwidth S/H
- Shutdown and nap modes
- Serial SPI port for configuration
- Operating temperature range from 0°C to 70°C
- 52-lead (7mm × 8mm) plastic QFN package
Technical Specifications
| ADC Architecture | Pipelined |
|---|---|
| Sampling Rate | 65MSPS |
| Input Channel Type | Differential, Single Ended |
| Supply Voltage Min | 1.7V |
| IC Case / Package | QFN-EP |
| IC Mounting | Surface Mount |
| Operating Temperature Max | 70°C |
| Qualification | - |
| Resolution | 16bit |
|---|---|
| No. of Channels | 2Channels |
| Interfaces | Parallel, Serial |
| Supply Voltage Max | 1.9V |
| No. of Pins | 52Pins |
| Operating Temperature Min | 0°C |
| Product Range | Dual 16-Bit Pipelined ADCs |
| SVHC | To Be Advised |
Technical Docs (1)
Legislation and Environmental
| US ECCN: | 3A991.c.4 |
|---|---|
| EU ECCN: | NLR |
| RoHS Compliant: | Yes RoHS |
| RoHS Phthalates Compliant: | Yes RoHS |
| SVHC: | To Be Advised |
| Download Product Compliance Certificate | Product Compliance Certificate |
