AD9866BCPZ

AD9866 is a mixed-signal front end (MxFE®) IC for transceiver applications. Its flexible digital interface, power saving modes, and high Tx-to-Rx isolation make it well-suited for half- and full-duplex applications. The digital interface is extremely flexible allowing simple interfaces to digital back ends that support half- or full-duplex data transfers, thus often allowing the device to replace discrete ADC and DAC solutions. Power saving modes include the ability to reduce power consumption of individual functional blocks or to power down unused blocks in half-duplex applications. A serial port interface (SPI®) allows software programming of the various functional blocks. An on-chip PLL clock multiplier and synthesizer provide all the required internal clocks, as well as two external clocks from a single crystal or clock source. It is used in application such as powerline networking, VDSL and HPNA.

• Low cost 3.3V CMOS MxFE for broadband modems
• 2×/4× interpolation filter, 200MSPS DAC update rate
• Minimum gain is 19.5dB typical at (AVDD = 3.3V ±5%)
• Input voltage noise density (RxPGA gain = 48dB, f-3dBF = 26MHz) is 2.4nV/√Hz typical
• Third order, programmable low-pass filter, flexible digital data path interface
• Half- and full-duplex operation, various power-down/reduction modes
• Internal clock multiplier (PLL), 2 auxiliary programmable clock outputs
• Update rate is 200MSPS, offset error is 2µA typical at (AVDD = 3.3V ±5%)
• Total harmonic distortion is -68.7dBc typical at (AVDD = 3.3V ±5%)
• Operating temperature range from -40°C to +85°C, package style is 64-lead LFCSP-VQ

Notes

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