
| Quantity | Price | Promotional price |
|---|---|---|
| 1+ | $0.735 | $0.735 |
| 10+ | $0.000 | $0.735 |
| 25+ | $0.000 | $0.735 |
| 50+ | $0.000 | $0.735 |
| 100+ | $0.000 | $0.735 |
| 250+ | $0.000 | $0.735 |
| 500+ | $0.000 | $0.735 |
| 1000+ | $0.000 | $0.735 |
Product Information
Product Overview
The SN65LVDS32BDR is a quad differential Line Receiver offers improved performance and features that implement the electrical characteristics of low-voltage differential signalling (LVDS). LVDS is defined in the TIA/EIA-644 standard. This improved performance represents the second generation of receiver products for this standard, providing a better overall solution for the cabled environment. This generation of products is an extension to TIs overall product portfolio and is not necessarily a replacement for older LVDS receivers. Improved features include an input common-mode voltage range 2V wider than the minimum required by the standard. This will allow longer cable lengths by tripling the allowable ground noise tolerance to 3V between a driver and receiver. Precise control of the differential input voltage thresholds now allows for inclusion of 50mV of input voltage hysteresis to improve noise rejection on slowly changing input signals.
- Active failsafe assures a high-level output with no input
- Inputs remain high-impedance on power-down
- Integrated 110Ω line termination resistors offered with the LVDT series
- Pin-compatible with the AM26LS32, MC3486 or µA9637
- 4ns Typical propagation delay time
- 400Mbps Signalling rate
- Green product and no Sb/Br
Applications
Portable Devices, Communications & Networking
Technical Specifications
Differential Line Receiver
-
-
3V
SOIC
16Pins
LVTTL
-
MSL 1 - Unlimited
LVDS Line Receiver
-40°C
85°C
SOIC
3.6V
LVDS
4bit
-
No SVHC (27-Jun-2018)
Legislation and Environmental
RoHS
RoHS
Product Compliance Certificate
