CD74HCT40103M

CD74HCT40103M is a CD74HCT40103 high speed CMOS logic 8-stage synchronous down counter with a single output which is active when the internal count is zero. It has control inputs for enabling or disabling the clock, for clearing the counter to its maximum count, and for presetting the counter either synchronously or asynchronously. All control inputs and the TC output are active-low logic. When the MR input is low, the counter is asynchronously cleared to its maximum count of 25510, regardless of the state of any other input.

• Synchronous or asynchronous preset, cascadable in synchronous or ripple mode
• 10 LSTTL loads standard outputs, 15 LSTTL loads bus driver outputs
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• Operation range from 4.5V to 5.5V
• Direct LSTTL input logic compatibility VIL= 0.8V (max), VIH = 2V (min)
• CMOS input compatibility, Il ≤ 1µA at VOL, VOH
• 16pin SOIC package, temperature range from -55 to 125°C