25LC256-I/SM

The 25LC256-I/SM is a 256kB serial Electrically Erasable Programmable Read-Only Memory (EEPROM) accessed via a simple serial peripheral interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled through a chip select (CS) input. Communication to the device can be paused via the hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts.

• Maximum clock speed 10MHz
• Low-power CMOS technology
• Self-timed erase and write cycles 5ms maximum
• Block write protection - Protect none, 1/4, 1/2 or all of array
• Built-in write protection
• Power-on/off data protection circuitry
• Write enable latch
• Write-protect pin
• Sequential read
• High reliability
• Endurance - 1000000 erase/write cycles
• Data retention - <gt/>200 years
• ESD protection - <gt/>4000V