AS4C1M16S-7TCN

AS4C1M16S-7TCN is a 1M x 16bit synchronous DRAM (SDRAM). The 16Mb SDRAM is a high-speed CMOS synchronous DRAM containing 16Mbits. It is internally configured as a dual 512K word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 16bit banks is organized as 2048 rows by 256 columns by 16 bits. Read and write accesses to the SDRAM are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a read or write command. The SDRAM provides programmable read or write burst lengths of 1, 2, 4, 8, or full pages, with a burst termination option. It is well suited for applications requiring high memory bandwidth and particularly well suited to high-performance PC applications.

• Self-refresh mode: standard, internal pipelined architecture
• 512K word x 16bit x 2-bank, auto refresh and self refresh
• Programmable mode registers, CAS latency: 2, or 3
• Burst type: sequential or interleaved, burst stop function
• Individual byte controlled by LDQM and UDQM, 4096 refresh cycles/64ms
• CKE power down mode, JEDEC standard +3.3V±0.3V power supply
• LVTTL interface
• 143MHz frequency
• 50-pin TSOPII package
• Commercial temperature range from 0 to 70°C