IPRUSB2SFP003

The IPRUSB2SFP003 is a USB 2.0 device software enumeration (USB20SR) IP core. It is a RAM based USB 2.0 device core with 32bit Avalon interface and ULPI interface support. The core supports both high speed (480Mbps) and full speed (12Mbps) functionality. The core supports three preconfigured endpoints control, IN, and OUT. It can be configured for up to 15 IN/OUT endpoints on customer's request at additional cost. Each configurable endpoint has an endpoint controller that supports interrupt, bulk, and isochronous transfers. The core has been optimized for Altera FPGAs and its functionality has been verified on the hardware with Altera Quartus II. The package includes ModelSim precompiled library for core simulation and verification. USB20SR IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL.

• Complete solution comprising of core, software and board for easy and quick implementation
• USB 2.0 USB IF high speed certified (TID# 70680007)
• Reduced risk with proven, compliant technology
• ULPI Interface support
• Premier direct support from SLS IP designers
• Low system and license cost
• Ready to use peripheral for Nios II applications
• Optimized for use with Altera Nios II embedded processor
• Avalon system Interconnect fabric compliant
• Optimized LE count

Applications

Embedded Design & Development

Contents

Core Commander board, Encrypted core, Perpetual license for single project on single node, Demonstrations, Reference design with full programming file generation support for Core Commander development board (QAR file), Simulation library for Altera Modelsim, Software drivers, Software library (VC), Nios II sample applications (with C code), Documentation, Utilities.

Notes

IP integration support available with the purchase of full ƒƒversion, additional support on chargeable basis for 3 months or ƒƒmore and core modification support available at additional cost.