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| Cantidad | Precio |
|---|---|
| 1+ | $17.740 |
| 5+ | $15.910 |
| 10+ | $15.100 |
| 25+ | $14.580 |
| 50+ | $14.120 |
| 100+ | $13.850 |
| 250+ | $13.610 |
Información del producto
Resumen del producto
SN65LVDM1676DGG is a 16-channel LVDM transceiver. This (integrated termination) consists of sixteen differential line transmitters or receivers (transceiver) that use low-voltage differential signaling (LVDS) to achieve signaling rates up to 200Mbps per transceiver configured as a receiver and up to 650Mbps per transceiver configured as a transmitter. This product is similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247mV into a 50-load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of 100mV with up to 1V of ground potential difference between a transmitter and receiver.
- Bus-terminal ESD protection exceeds 12kV
- Low-voltage TTL (LVTTL) logic input levels are 5V tolerant
- Supply current is 140mA typ at (driver enabled, receiver disabled, RL = 100 ohm)
- Short-circuit output current is 10mA max at (VOD = 0V)
- Power-off output current is 10µA max at (VCC = 1.5V, VO = 2.4V)
- Input capacitance is 5pF typ at (VI = 0.4 sin (4E6πt) + 0.5V)
- 2.5ns typ propagation delay time, low-to-high-level output at (RL = 100 ohm, CL = 10pF)
- 0.1ns typ pulse skew at (RL = 100 ohm, CL = 10pF)
- Operating temperature range from -40°C to 85°C
- 64-pin TSSOP package
Especificaciones técnicas
0
0
0
3
TSSOP
64Pines
LVTTL, M-LVDS
LVTTL, M-LVDS
0
0
MSL 2 - 1 year
Differential Line Transceiver
-40
85
3.6
0
0
LVTTL, M-LVDS
16
-
-
No SVHC (27-Jun-2018)
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Legislación y medioambiente
RoHS
RoHS
Certificado de conformidad del producto