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TPS51200DRCT

DDR Termination Regulator, DDR, DDR2, DDR3, DDR3L, 2.5V Rail/3.5V Input, 5.5A Sink, VSON-10

TPS51200DRCT - DDR Termination Regulator, DDR, DDR2, DDR3, DDR3L, 2.5V Rail/3.5V Input, 5.5A Sink, VSON-10

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Manufacturer Part No:
TPS51200DRCT
Newark Part No.:
01P3287
Technical Datasheet:
TPS51200DRCT   Datasheet
See all Technical Docs

Product Overview

The TPS51200DRCT is a sink/source Double Data Rate (DDR) Termination Regulator, specifically designed for low input voltage, low-noise systems where space is a key consideration. The TPS51200DRCT maintains a fast transient response and only requires a minimum output capacitance of 20µF. The TPS51200DRCT supports a remote sensing function and all power requirements for DDR, DDR2, DDR3 and low power DDR3/DDR4 VTT bus termination. In addition, the TPS51200DRCT provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.
  • 1.1 to 3.5V VLDOIN Voltage range
  • Sink/source termination regulator includes droop compensation
  • Requires minimum output capacitance of 20µF (typically 3 x 10µF MLCCs)
  • PGOOD to monitor output regulation
  • EN Input
  • REFIN Input allows for flexible input tracking either directly or through resistor divider
  • Remote sensing (VOSNS)
  • ±10mA Buffered reference (REFOUT)
  • Built-in soft start, UVLO and OCL
  • Thermal shutdown
  • Meets DDR, DDR2 JEDEC specifications, supports DDR3 and low-power DDR3/DDR4 VTT applications

Applications

Power Management, Computers & Computer Peripherals, Communications & Networking, Consumer Electronics

Product Information

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:
DDR1, DDR2, DDR3, LPDDR3, DDR4, LPDDR4

:
3A

:
2.375V

:
3.5V

:
VSON

:
10Pins

:
-

:
MSL 2 - 1 year
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Technical Docs (5)

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