74AUP1T97GW-Q100H

74AUP1T97GW-Q100H is a low-power configurable gate with voltage-level translator. It is a configurable multiple function gate with level translating, Schmitt-trigger inputs. This device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer; using the 3bit input. All inputs can be connected directly to VCC or GND. Low threshold Schmitt trigger inputs allow this device to be driven by 1.8V logic levels in 3.3V applications. This device ensures very low static and dynamic power consumption across the entire VCC range from 2.3V to 3.6V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the automotive electronics council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

• Wide supply voltage range from 2.3V to 3.6V, complies with JEDEC standards
• CMOS low power dissipation, high noise immunity
• Low noise overshoot and undershoot <lt/> 10% of VCC, ESD protection
• IOFF circuitry provides partial power-down mode operation
• Latch-up performance exceeds 100mA per JESD 78 Class II
• Input leakage current is ±0.1μA max at (VI=GND to 3.6V;VCC = 0V to 3.6V, Tamb = 25°C)
• Supply current is 1.2μA max at (VI=GND or VCC;IO = 0A;VCC = 2.3V to 3.6V, Tamb = 25°C)
• Input capacitance is 0.8pF typical at (VCC = 0V to 3.6V;VI= GND or VCC, Tamb = 25°C)
• Propagation delay is 3.5ns typical at (CL = 5pF, 25°C)
• Operating temperature range from -40°C to +125°C, TSSOP6 package