Low

DS90UR241IVS/NOPB - 

SerDes, Serialiser, 1.032 Gbps, LVCMOS, LVDS, TQFP, 48 Pins

TEXAS INSTRUMENTS DS90UR241IVS/NOPB

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Manufacturer Part No:
DS90UR241IVS/NOPB
Newark Part No.:
32M0918
Technical Datasheet:
(EN)
See all Technical Docs

Product Information

:
LVCMOS
:
-
:
Each
:
1Outputs
:
LVDS
:
TQFP
:
48Pins
:
3V
:
1
:
1.032Gbps
:
-
:
3.6V
:
Serialiser
:
MSL 3 - 168 hours
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Product Overview

The DS90UR241IVS/NOPB is a FPD-Link II DC-balanced Serializer Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is ideally suited for driving graphical data to displays requiring 18-bit colour depth - RGB666 + HS, VS, DE + three additional general-purpose data channels. This single serial stream simplifies transferring a 24-bit bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. The device saves system cost by narrowing data paths that in turn reduce PCB layers, cable width and connector size and pins. It incorporates FPD-Link II LVDS signalling on the high-speed I/O. FPD-Link II LVDS provides a low-power and low-noise environment for reliably transferring data over a serial transmission path. By optimizing the serializer output edge rate for the operating frequency range, EMI is further reduced.
  • Supports displays with 18-bit colour depth
  • Embedded clock with DC balancing supports AC-coupled data transmission
  • Capable to drive up to 10m shielded twisted-pair cable
  • Hot plug support
  • Individual power-down controls for both transmitter and receiver
  • Meets ISO 10605 ESD - greater than 8kV HBM ESD structure
  • 5 to 43MHz Pixel clock
  • 24:1 Interface compression
  • Green product and no Sb/Br

Applications

Medical, HVAC, Security, Communications & Networking, Power Management, Industrial, Automation & Process Control

Warnings

Device has limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

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