Evaluation Module, Low Additive Phase Noise Clock Buffer, CDCLVP1102

CDCLVP1102EVM - Evaluation Module, Low Additive Phase Noise Clock Buffer, CDCLVP1102

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Product Overview

The CDCLVP1102EVM evaluation module is designed to demonstrate the electrical performance of the CDCLVP1102. The CDCLVP1102 is a high performance, low additive phase noise clock buffer. It has a single universal input buffer that supports either single ended or differential clock inputs, and feeds to two LVPECL outputs. The device also features on chip bias generators that can provide the LVPECL common mode voltage to the device inputs. This fully assembled and factory tested evaluation board allows complete validation of the CDCLVP1102 device functionalities. For optimum performance, the board is equipped with 50W SMA connectors and well controlled, 50W impedance microstrip transmission lines.
  • Easy to use evaluation board to fan out Low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at +2.5-/+3.3-V
  • Single ended or differential input clocks
  • CDCLVP1102 supports two LVPECL outputs; CDCLVP1102EVM supports one LVPECL output


Wireless, Communications & Networking, Medical, Test & Measurement, Clock & Timing


This integrated circuit can be damaged by ESD. TI recommends that all integrated circuits be handled with appropriate precautions. Failure to do so can cause damage

Product Information

Texas Instruments
Clock & Timing
Clock Buffer
Board Only
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