Evaluation Module, Low Additive Jitter Clock Buffer, CDCLVD2102

CDCLVD2102EVM - Evaluation Module, Low Additive Jitter Clock Buffer, CDCLVD2102

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Product Overview

The CDCLVD2102EVM evaluation module is designed to demonstrate the electrical performance of the CDCLVD2102. The CDCLVD2102 are high performance, low additive jitter clock buffers. They have two universal input buffers that support single ended or differential clock inputs. The devices also feature on chip bias generators that can provide the LVDS common mode voltage to the device inputs. The CDCLVD2102 is specifically designed for driving 50ohm transmission lines. If driving the inputs in single ended mode, the appropriate bias voltage should be applied to the unused negative input pin. This fully assembled and factory tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well controlled 50ohm impedance microstrip transmission lines.
  • Easy to use evaluation board to fan out Low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pins configurable through jumpers
  • Board powered at 2.5V
  • single ended or differential input clocks
  • Device supports four LVDS outputs, EVM supports two LVDS outputs


Communications & Networking, Medical, Test & Measurement, Wireless, Clock & Timing


It is important to operate this EVM within the input voltage range of -0.2V to Vcc +0.2V and the output voltage range of -0.2V to Vcc +0.2V .

Product Information

Texas Instruments
Clock & Timing
Clock Buffer
SCAS904, Dual 1:2 Low Additive Jitter LVDS Buffer, 4 LVDS O/P Clock Buffer Evaluation Board
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