Evaluation Module, Low-Additive Jitter, Four-LVDS-Outputs Clock Buffer, Divider, CDCLVD1213

CDCLVD1213EVM - Evaluation Module, Low-Additive Jitter, Four-LVDS-Outputs Clock Buffer, Divider, CDCLVD1213

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Product Overview

The CDCLVD1213EVM evaluation module is designed to demonstrate the electrical performance of the CDCLVD1213. The CDCLVD1213 is a high performance, low additive jitter clock buffer with divider. The CDCLVD1213 clock buffer distributes an input clock to 4 pairs of differential LVDS clock outputs with low additive jitter for clock distribution. The input can either be LVDS, LVPECL, or CML. The device has one differential input with internal 140ohm differential input termination. This fully assembled and factory tested evaluation board allows complete validation of device functionalities. For optimum performance, the board is equipped with SMA connectors and well controlled 50ohm impedance microstrip transmission lines.
  • Easy to use evaluation board to fan out Low phase noise clocks
  • Easy device setup
  • Fast configuration
  • Control pin configurable through jumpers
  • Board powered at 2.5V
  • Differential input clocks
  • Device and EVM support four LVDS outputs


Communications & Networking, Medical, Test & Measurement, Wireless, Clock & Timing


It is important to operate this EVM within the input voltage range of -0.2V to Vcc +0.2V and the output voltage range of -0.2V to Vcc +0.2V .

Product Information

Texas Instruments
Clock & Timing
Clock Buffer
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