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S29AL008J70TFI010 - 

Flash Memory, 8 Mbit, 1M x 8bit / 512K x 16bit, CFI, Parallel, TSOP, 48 Pins

S29AL008J70TFI010 - Flash Memory, 8 Mbit, 1M x 8bit / 512K x 16bit, CFI, Parallel, TSOP, 48 Pins

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Manufacturer Part No:
S29AL008J70TFI010
Newark Part No.:
43P9763
Availability:
No Longer Manufactured

Product Information

:
Yes
:
No SVHC (17-Dec-2015)
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Product Overview

The S29AL008J70TFI010 is a 8MB CMOS boot sector Flash Memory organized as 1048576 bytes or 524288 words. The word-wide data appears on DQ15-DQ0, the byte-wide data appears on DQ7-DQ0. This device is designed to be programmed in-system with the standard system 3VCC supply. The device can also be programmed in standard EPROM programmers. The device offers access times of up to 70ns allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls. The device requires only a single 3V power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. The S29AL008J is entirely command set compatible with the JEDEC single-power-supply flash standard. Commands are written to the command register using standard microprocessor write timings.
  • Top boot sector device
  • Manufactured on 110nm process technology - Fully compatible with 200nm S29AL008D
  • Secured silicon sector region
  • Flexible sector architecture
  • Hardware method of locking a sector to prevent any program or erase operations within that sector
  • Reduces overall programming time when issuing multiple program command sequences
  • Pinout and software compatible with single-power supply flash
  • Superior inadvertent write protection
  • High performance
  • Ultralow power consumption
  • Cycling endurance - 1000000 cycles per sector typical
  • Data retention - 20 years typical
  • Erase suspend/erase resume
  • Data# polling and toggle bits
  • Provides a hardware method of detecting program or erase cycle completion
  • Hardware method to reset the device to reading array data

Applications

Computers & Computer Peripherals, Industrial, Communications & Networking, Consumer Electronics

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