Low

NXP  HEF4013BT  Flip-Flop, Complementary, Positive Edge, D, 30 ns, 40 MHz, 2.4 mA, SOIC, 14 Pins

NXP HEF4013BT
Technical Data Sheet (165.71KB) EN See all Technical Docs

Image is for illustrative purposes only. Please refer to product description.

Product Overview

The HEF4013BT is a Dual D-type Flip-flop features independent set-direct input (SD), clear-direct input (CD), clock input (CP) and outputs (Q, Q). Data is accepted when CP is LOW and is transferred to the output on the positive-going edge of the clock. The active high asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock input's Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
  • Tolerant of slow clock rise and fall times
  • Fully static operation
  • Standardized symmetrical output characteristics
  • Complies with JEDEC standard JESD 13-B

 

Product Information

Flip-Flop Type:
D
Propagation Delay:
30ns
Frequency:
40MHz
Output Current:
2.4mA
Logic Case Style:
SOIC
No. of Pins:
14Pins
Trigger Type:
Positive Edge
IC Output Type:
Complementary, Differential
Supply Voltage Min:
4.5V
Supply Voltage Max:
15.5V
Operating Temperature Min:
-40°C
Operating Temperature Max:
70°C
Packaging:
Each
Product Range:
-
MSL:
MSL 1 - Unlimited
Supply Voltage Range:
4.5V to 15.5V
SVHC:
To Be Advised

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Applications

  • Industrial

Legislation and Environmental

Moisture Sensitivity Level:
MSL 1 - Unlimited
RoHS Compliant:
Yes

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