NXP  MSC8156ADS  Evaluation Board, DSP, Multi Protocol Baseband Accelerator

Technical Data Sheet (144.51KB) EN See all Technical Docs

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Product Overview

The MSC8156 application development system is a complete debugging environment intended for engineers developing applications for the MSC8156 family of NXP digital signal processors (DSPs) targeting high-bandwidth highly computational DSP applications. It is optimized for 3GPP, TD-SCDMA, 3G-LTE, and WiMAX applications. The MSC8156 contains six StarCore SC3850 DSP subsystems (48 GMACS at 1 GHz).
  • 1 MB of M3 shared memory
  • Two DDR2/DDR3 memory controllers with a 64-bit data rate up to 800 M
  • High speed serial interface (HSSI) with two 4-channel SerDes ports
  • Dual RISC QUICC Engine™ subsystem
  • Two Dallas E1/T1 framers connect to the four DSP TDM ports
  • P1 and P3 connectors carry the DSP GPIO and TDM signals
  • A DIP switch array and associated FPGA supports the DSP configuration and boot support at reset


Product Information

Silicon Manufacturer:
Accessory Type:
Core Architecture:
For Use With:
Core Sub-Architecture:
Silicon Core Number:
Silicon Family Name:
MSC815x, MSC825x
No. of Bits:
Kit Contents:
Product Range:
Multi Protocol Baseband Accelerator, High Speed Serial Interface
No SVHC (17-Dec-2015)

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