NXP  MPC8555CDS  Configurable Development System, For MPC8555, PowerQUICC, Debug Interface JTAG Header


Product Overview

The MPC8555CDS is a configurable development system is designed to aid hardware and software developers of the PowerQUICC III family by providing an evaluation platform for MPC8555E, and MPC8541E derivatives in the 783 pin FC PBGA package. The configurable development system(CDS) is preloaded with U-boot and Linux BSP, it has 256MB DDR SDRAM DIMM module, 2 banks of flash 64Mb each. The on board interfaces include JTAG/COP, USB, dual UART, dual PCI, 10/100/1000 Base-T fast Ethernets interface, and a 155Mbps ATM UNI with optical interface. Using the CDS System on board resources and an associated debugger, developers are able to download and run code, set breakpoints, display memory and registers, and connect proprietary hardware via the expansion connectors. That code can then be incorporated into a desired system with the MPC85xx processor.
  • Supports 8bit Multi PHY UTOPIA Level 2 with UTOPIA ADTECH interface
  • 10/100 Base-T Ethernet port on FCC2
  •  Dual RS232 serial ports
  • Dual PCI 32 bit bus or single 64 bit PCI bus @ 3.3 V / 66 MHz
  •  Dual USB ports
  • Supports one or more Power QuiccIII family processors
  •  Debug interface JTAG header, monitoring LEDs, mictor header for local bus debug
  • Configuration control, SPD, Voltage monitoring
  • Programmable power supply via I2C configuration
  • Supports four Ethernet ports MII/GMII (10/100, or 1G rate)


Product Information

Silicon Manufacturer:
Accessory Type:
Core Architecture:
Power Architecture
For Use With:
Core Sub-Architecture:
Silicon Core Number:
Silicon Family Name:
No. of Bits:
Kit Contents:
Evaluation Board
Product Range:
10/100 Base-T Ethernet port on FCC2, Debug Interface JTAG Header
No SVHC (17-Dec-2015)

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