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CY8C4245LQI-483 - 

ARM Microcontroller, PSoC 4 Series, ARM Cortex-M0 Microcontrollers, 32bit, 48 MHz, 32 KB, 4 KB

CY8C4245LQI-483 - ARM Microcontroller, PSoC 4 Series, ARM Cortex-M0 Microcontrollers, 32bit, 48 MHz, 32 KB, 4 KB

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Manufacturer Part No:
CY8C4245LQI-483
Newark Part No.:
86W0169
Product Range
ARM Cortex-M0 Microcontrollers
Technical Datasheet:
(EN)
Availability:
No Longer Manufactured
See all Technical Docs

Product Information

:
ARM Cortex-M0
:
48
:
32bit
:
32
:
4
:
40
:
UFQFN
:
34
:
I2C, SPI, UART
:
1.71
:
5.5
:
Each
:
ARM Cortex-M0 Microcontrollers
:
-
:
MSL 3 - 168 hours
:
No SVHC (17-Dec-2015)
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Product Overview

The CY8C4245LQI-483 is a 32-bit PSoC®4 scalable and reconfigurable mixed-signal programmable Embedded System-on-Chip Microcontroller with an ARM Cortex-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200 product family, based on this platform, is a combination of a microcontroller with digital programmable logic, high-performance analog-to-digital conversion, opamps with Comparator mode and standard communication and timing peripherals. The PSoC 4200 products will be fully upward compatible with members of the PSoC 4 platform for new applications and design needs. The programmable analog and digital sub-systems allow flexibility and in-field tuning of the design.
  • 32-bit MCU Subsystem
  • 48MHz ARM Cortex-M0 CPU with single cycle multiply
  • 32kB of Flash with read accelerator
  • 4kB of SRAM
  • Two Op-amps
  • 12-bit 1MSPS SAR ADC
  • Two current DACs (IDACs)
  • Two low-power comparators that operate in Deep Sleep
  • 20nA Stop mode with GPIO pin wakeup
  • Hibernate and deep sleep modes allow wakeup-time versus power trade-offs
  • CapSense Sigma-Delta provides best-in-class SNR (>5:1) and water tolerance
  • Cypress supplied software component makes capacitive sensing design easy
  • Automatic hardware tuning (SmartSense™)
  • LCD drive supported on all pins (common or segment)
  • Operates in deep sleep mode with 4-bit per pin memory
  • Two independent run-time reconfigurable serial communication blocks (SCBs)
  • Four 16-bit timer/counter pulse-width modulator (TCPWM) blocks
  • Center-aligned, Edge and Pseudo-Random modes
  • Comparator-based triggering of Kill signals
  • Any GPIO pin can be CapSense, LCD, analog or digital

Applications

Industrial, Embedded Design & Development

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