AD9557/PCBZ - 

Evaluation Board, Dual Input Multiservice Line Card Adaptive Clock Translator, AD9557


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Newark Part No.:
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Product Overview

The AD9557/PCBZ is an evaluation board for evaluating the AD9557 device. The AD9557 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems including synchronous optical networks (SONET/SDH). The AD9557 provides clocking outputs that are directly related in phase and frequency to the selected (active) reference, but with jitter characteristics that are governed by the system clock, the DCO and the output PLL. The AD9557 generates an output clock synchronised to four external input references. The Digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The Digitally controlled loop and holdover circuitry of the AD9557 continuously generates a low jitter output clock even when all reference inputs have failed.
  • Supports GR-1244 stratum-3 stability in holdover mode
  • Smooth reference switchover with virtually no disturbance on output phase
  • Supports Telcordia GR-253 jitter generation, transfer and tolerance for SONET/SDH
  • ITU-T G.8262 synchronous Ethernet slave clocks
  • AD9557/PCBZ supports ITU-T G.823, G.824, G.825 and G.8261
  • Features Auto/Manual holdover and reference switchover
  • Input reference frequencies of 2KHz to 1250MHz
  • Reference validation and frequency monitoring (1ppm)
  • 20bit programmable input reference divider
  • 17bit integer and 24bit fractional feedback divider in Digital Programmable Logic


Communications & Networking, Wireless, Clock & Timing

Product Information

Analog Devices
Clock & Timing
Clock Generator
Evaluation Board AD9557
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